-40%
AGILENT HP 54852A 2 GHz 10 GS/s 4 CHANNEL OSCILLOSCOPE PARTS
$ 448.8
- Description
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Description
Up for sale is an AGILENT HP 54852A 2 GHz 10 GS/s 4 CHANNEL OSCILLOSCOPE FOR PARTS or REPAIR ONLY.This scope has two problems:
1. Powers up, starts to boot Windows XP (but never finishes), runs for about 1.5 minutes, then powers off.If I enter the BIOS setup instead of booting Windows, the same power off will occur. When this happens +5SB (+5V stand-by for soft power on) goes away.
2. With a known-working power supply, CH2 fails calibration. Self test also fails. During calibration, scope will not detect the calibration signal on CH2. Because of this, it will not allow me to continue to CH3 and CH4. CH2 will not display any signal, nor will it allow you to position the trace off 0VDC center-point.
No returns accepted as this is for PARTS or REPAIR ONLY.
I have not attempted any repairs on the scope's acquisition board. There are no signs of damage, rework, or blown components.
The acquisition board has the following hybrids (many, if not all, used in 54853A, 54854A, and 54855A scopes.):
QTY 4 1NB7-8509
QTY 8 1NB7-8510
QTY 4 1NB7-8508
QTY 4 1NB7-8518
QTY 1 1NB7-8511
QTY 4 1NB4-5045
The error log contents from the self test are as follows:
** Test Run ** Scope SelfTest --- 03 APR 2021 05:34:54
Channel 1 Test Dac
R^2 Correlation: 0.999999
Maximum Dac Error: 0.009345
Setting: -9.745 volts Output: -9.744 volts Error: -0.01%
Setting: -7.691 volts Output: -7.686 volts Error: -0.02%
Setting: -5.637 volts Output: -5.640 volts Error: 0.01%
Setting: -3.583 volts Output: -3.583 volts Error: -0.00%
Setting: -1.530 volts Output: -1.525 volts Error: -0.02%
Setting: -0.500 volts Output: -0.501 volts Error: 0.00%
Setting: 0.524 volts Output: 0.520 volts Error: 0.02%
Setting: 2.578 volts Output: 2.580 volts Error: -0.01%
Setting: 4.632 volts Output: 4.642 volts Error: -0.05%
Setting: 6.686 volts Output: 6.700 volts Error: -0.07%
Setting: 8.740 volts Output: 8.759 volts Error: -0.09%
Channel 1 &B -- PASSED&E
Channel 2 Test Dac
R^2 Correlation: 1.000000
Maximum Dac Error: 0.005526
Setting: -9.755 volts Output: -9.751 volts Error: -0.02%
Setting: -7.698 volts Output: -7.690 volts Error: -0.04%
Setting: -5.641 volts Output: -5.641 volts Error: -0.00%
Setting: -3.584 volts Output: -3.585 volts Error: 0.01%
Setting: -1.527 volts Output: -1.528 volts Error: 0.00%
Setting: -0.496 volts Output: -0.500 volts Error: 0.02%
Setting: 0.530 volts Output: 0.528 volts Error: 0.01%
Setting: 2.587 volts Output: 2.589 volts Error: -0.01%
Setting: 4.644 volts Output: 4.645 volts Error: -0.01%
Setting: 6.700 volts Output: 6.703 volts Error: -0.01%
Setting: 8.757 volts Output: 8.762 volts Error: -0.02%
Channel 2 &B -- PASSED&E
Channel 3 Test Dac
R^2 Correlation: 0.999998
Maximum Dac Error: 0.014235
Setting: -9.785 volts Output: -9.750 volts Error: -0.17%
Setting: -7.721 volts Output: -7.700 volts Error: -0.10%
Setting: -5.658 volts Output: -5.651 volts Error: -0.03%
Setting: -3.594 volts Output: -3.600 volts Error: 0.03%
Setting: -1.530 volts Output: -1.537 volts Error: 0.03%
Setting: -0.496 volts Output: -0.501 volts Error: 0.02%
Setting: 0.533 volts Output: 0.535 volts Error: -0.01%
Setting: 2.597 volts Output: 2.601 volts Error: -0.02%
Setting: 4.660 volts Output: 4.659 volts Error: 0.01%
Setting: 6.724 volts Output: 6.718 volts Error: 0.03%
Setting: 8.788 volts Output: 8.773 volts Error: 0.07%
Channel 3 &B -- PASSED&E
Channel 4 Test Dac
R^2 Correlation: 1.000000
Maximum Dac Error: 0.005346
Setting: -9.756 volts Output: -9.764 volts Error: 0.04%
Setting: -7.699 volts Output: -7.709 volts Error: 0.05%
Setting: -5.643 volts Output: -5.644 volts Error: 0.00%
Setting: -3.586 volts Output: -3.584 volts Error: -0.01%
Setting: -1.530 volts Output: -1.534 volts Error: 0.02%
Setting: -0.499 volts Output: -0.501 volts Error: 0.01%
Setting: 0.526 volts Output: 0.525 volts Error: 0.01%
Setting: 2.583 volts Output: 2.585 volts Error: -0.01%
Setting: 4.639 volts Output: 4.638 volts Error: 0.00%
Setting: 6.696 volts Output: 6.691 volts Error: 0.02%
Setting: 8.752 volts Output: 8.755 volts Error: -0.02%
Channel 4 &B -- PASSED&E
Channel 1 Test Dac Max: 9.794 volts
Channel 1 Test Dac Min: -10.000 volts
Channel 1 Test Dac MaxMin Test Passed
Channel 2 Test Dac Max: 9.799 volts
Channel 2 Test Dac Min: -10.000 volts
Channel 2 Test Dac MaxMin Test Passed
Channel 3 Test Dac Max: 9.806 volts
Channel 3 Test Dac Min: -10.000 volts
Channel 3 Test Dac MaxMin Test Passed
Channel 4 Test Dac Max: 9.796 volts
Channel 4 Test Dac Min: -10.000 volts
Channel 4 Test Dac MaxMin Test Passed
Channel 1 Gain Step Test &B -- PASSED&E
Channel 1 Gain Vernier Test &B -- PASSED&E
Channel 2 Gain Step Test &B -- PASSED&E
Channel 2 Gain Vernier Test &B -- PASSED&E
Channel 3 Gain Step Test &B -- PASSED&E
Channel 3 Gain Vernier Test &B -- PASSED&E
Channel 4 Gain Step Test &B -- PASSED&E
Channel 4 Gain Vernier Test &B -- PASSED&E
Test: &B&UVertical Test Group&E&B -- PASSED&E
Failed Pattern trigger mode Entered, trigger set True
chan 1 H chan 2 H chan 3 L chan 4 X .
Failed Pattern trigger mode Exited, trigger set True
chan 1 H chan 2 H chan 3 L chan 4 X .
Failed Pattern trigger mode Present Greater Than, Logic Trig circuit, trigger set False
chan 1 H chan 2 H chan 3 L chan 4 X .
Failed Pattern trigger mode Present Greater Than, Min. setting Hi Freq. Trig circuit, trig set True
chan 1 H chan 2 H chan 3 L chan 4 X .
Failed Pattern trigger mode Present Greater Than, Max. setting Hi Freq. Trig circuit, trig set True
chan 1 H chan 2 H chan 3 L chan 4 X .
Failed Pattern trigger mode Present Less Than, Logic Trig circuit, trigger set False
chan 1 H chan 2 H chan 3 L chan 4 X .
Test: &B&UTrigger Test Group&E&C13&&B -- FAILED&E
Test: &B&UTimebase Test Group&E&B -- PASSED&E
Start Channel 1 Register Test
BEAK_CTL Register: Random Pattern Test &B -- PASSED&E
SAMPL_CAL Register: Random Pattern Test &B -- PASSED&E
RADIX_COEFS Register: Random Pattern Test &B -- PASSED&E
DEC_CTL Register: Random Pattern Test &B -- PASSED&E
MEM_CTL Register: Random Pattern Test &B -- PASSED&E
ACQ_CTL Register: Random Pattern Test &B -- PASSED&E
READOUT Register: Random Pattern Test &B -- PASSED&E
PWR_CTL Register: Random Pattern Test &B -- PASSED&E
TEST_MODE Register: Random Pattern Test &B -- PASSED&E
VOLT_TEST Register: Random Pattern Test &B -- PASSED&E
DAC_TEST Register: Random Pattern Test &B -- PASSED&E
CLK_TEST Register: Random Pattern Test &B -- PASSED&E
MEM_BIST Register: Random Pattern Test &B -- PASSED&E
Channel 1 Register Test &B -- PASSED&E
Start Channel 2 Register Test
BEAK_CTL Register: Random Pattern Test &B -- PASSED&E
SAMPL_CAL Register: Random Pattern Test &B -- PASSED&E
RADIX_COEFS Register: Random Pattern Test &B -- PASSED&E
DEC_CTL Register: Random Pattern Test &B -- PASSED&E
MEM_CTL Register: Random Pattern Test &B -- PASSED&E
ACQ_CTL Register: Random Pattern Test &B -- PASSED&E
READOUT Register: Random Pattern Test &B -- PASSED&E
PWR_CTL Register: Random Pattern Test &B -- PASSED&E
TEST_MODE Register: Random Pattern Test &B -- PASSED&E
VOLT_TEST Register: Random Pattern Test &B -- PASSED&E
DAC_TEST Register: Random Pattern Test &B -- PASSED&E
CLK_TEST Register: Random Pattern Test &B -- PASSED&E
MEM_BIST Register: Random Pattern Test &B -- PASSED&E
Channel 2 Register Test &B -- PASSED&E
Start Channel 3 Register Test
BEAK_CTL Register: Random Pattern Test &B -- PASSED&E
SAMPL_CAL Register: Random Pattern Test &B -- PASSED&E
RADIX_COEFS Register: Random Pattern Test &B -- PASSED&E
DEC_CTL Register: Random Pattern Test &B -- PASSED&E
MEM_CTL Register: Random Pattern Test &B -- PASSED&E
ACQ_CTL Register: Random Pattern Test &B -- PASSED&E
READOUT Register: Random Pattern Test &B -- PASSED&E
PWR_CTL Register: Random Pattern Test &B -- PASSED&E
TEST_MODE Register: Random Pattern Test &B -- PASSED&E
VOLT_TEST Register: Random Pattern Test &B -- PASSED&E
DAC_TEST Register: Random Pattern Test &B -- PASSED&E
CLK_TEST Register: Random Pattern Test &B -- PASSED&E
MEM_BIST Register: Random Pattern Test &B -- PASSED&E
Channel 3 Register Test &B -- PASSED&E
Start Channel 4 Register Test
BEAK_CTL Register: Random Pattern Test &B -- PASSED&E
SAMPL_CAL Register: Random Pattern Test &B -- PASSED&E
RADIX_COEFS Register: Random Pattern Test &B -- PASSED&E
DEC_CTL Register: Random Pattern Test &B -- PASSED&E
MEM_CTL Register: Random Pattern Test &B -- PASSED&E
ACQ_CTL Register: Random Pattern Test &B -- PASSED&E
READOUT Register: Random Pattern Test &B -- PASSED&E
PWR_CTL Register: Random Pattern Test &B -- PASSED&E
TEST_MODE Register: Random Pattern Test &B -- PASSED&E
VOLT_TEST Register: Random Pattern Test &B -- PASSED&E
DAC_TEST Register: Random Pattern Test &B -- PASSED&E
CLK_TEST Register: Random Pattern Test &B -- PASSED&E
MEM_BIST Register: Random Pattern Test &B -- PASSED&E
Channel 4 Register Test &B -- PASSED&E
Start Channel 1 Interface Test
Output set to all 0's: Port 0:&B -- PASSED&E Port 1:&B -- PASSED&E
Output set to all 1's: Port 0:&B -- PASSED&E Port 1:&B -- PASSED&E
Channel 1 Interface Test &B -- PASSED&E
Start Channel 2 Interface Test
Output set to all 0's: Port 0:&B -- PASSED&E Port 1:&B -- PASSED&E
Output set to all 1's: Port 0:&B -- PASSED&E Port 1:&B -- PASSED&E
Channel 2 Interface Test &B -- PASSED&E
Start Channel 3 Interface Test
Output set to all 0's: Port 0:&B -- PASSED&E Port 1:&B -- PASSED&E
Output set to all 1's: Port 0:&B -- PASSED&E Port 1:&B -- PASSED&E
Channel 3 Interface Test &B -- PASSED&E
Start Channel 4 Interface Test
Output set to all 0's: Port 0:&B -- PASSED&E Port 1:&B -- PASSED&E
Output set to all 1's: Port 0:&B -- PASSED&E Port 1:&B -- PASSED&E
Channel 4 Interface Test &B -- PASSED&E
Start Channel 1 Interface Test
Analog input set to Maximum:&B -- PASSED&E
Analog input set to Minimum:&B -- PASSED&E
Channel 1 Analog Test &B -- PASSED&E
Start Channel 2 Interface Test
Analog input set to Maximum:&C13&&B -- FAILED&E
Analog input set to Minimum:&C13&&B -- FAILED&E
Channel 2 Analog Test &C13&&B -- FAILED&E
Start Channel 3 Interface Test
Analog input set to Maximum:&B -- PASSED&E
Analog input set to Minimum:&B -- PASSED&E
Channel 3 Analog Test &B -- PASSED&E
Start Channel 4 Interface Test
Analog input set to Maximum:&B -- PASSED&E
Analog input set to Minimum:&B -- PASSED&E
Channel 4 Analog Test &B -- PASSED&E
Start Channel 1 Output MUX Test
Channel 1 Output MUX Test &B -- PASSED&E
Start Channel 2 Output MUX Test
Channel 2 Output MUX Test &B -- PASSED&E
Start Channel 3 Output MUX Test
Channel 3 Output MUX Test &B -- PASSED&E
Start Channel 4 Output MUX Test
Channel 4 Output MUX Test &B -- PASSED&E
Start Channel 1 BIST Test
Memory Block 7.1.1 BIST test: -- WARNING&E
Memory Bank 7.1 BIST test:&B -- PASSED&E
Channel 1 BIST Test &B -- PASSED&E
Channel 1 Ptest &B -- PASSED&E
Start Channel 2 BIST Test
Channel 2 BIST Test &B -- PASSED&E
Channel 2 Ptest &B -- PASSED&E
Start Channel 3 BIST Test
Memory Block 6.1.13 BIST test: -- WARNING&E
Memory Bank 6.1 BIST test:&B -- PASSED&E
Channel 3 BIST Test &B -- PASSED&E
Channel 3 Ptest &B -- PASSED&E
Start Channel 4 BIST Test
Memory Block 3.1.8 BIST test: -- WARNING&E
Memory Bank 3.1 BIST test:&B -- PASSED&E
Channel 4 BIST Test &B -- PASSED&E
Channel 4 Ptest &B -- PASSED&E
Test: &B&UADC Test Group&E&C13&&B -- FAILED&E
Test: &B&UAcq Memory Test Group&E&B -- PASSED&E
Test: &B&UAcq Interface Test Group&E&B -- PASSED&E
Peregrine Temp Sensor reading: 42.0 Degrees C
Center Temp Sensor reading: 46.0 Degrees C
Preamp Temp Sensor reading: 36.0 Degrees C
Timebase Temp Sensor reading: 43.0 Degrees C
Main Temp Sensor reading: 31.0 Degrees C
Test: &B&UMisc Scope Test Group&E&B -- PASSED&E
&BFinal Result: &E&B&UScope SelfTest&E&C13&&B -- FAILED&E
Thanks for looking.